The physical dimension of a feature on a chip is referred to as “feature size.” Reducing the feature size on a chip permits more components to be fabricated on each chip, and more components to be fabrication on each silicon wafer, thereby reducing manufacturing costs on a per-wafer and a per-chip basis. Increasing the number of components in each chip can also improve chip performance because more components may become available to satisfy functional requirements.
SRAM devices are one type of device that may undergo such scaling to reduce manufacturing costs. SRAM is random access memory that retains data bits in its memory as long as power is being supplied. Unlike dynamic random access memory (DRAM), SRAM does not have to be periodically refreshed. SRAM also provides faster access to data than DRAM. Thus, for example, SRAM is frequently employed in a computer's cache memory, or as part of the random access memory digital-to-analog converters in video cards. A split word line SRAM cell has been used for the layout due to its friendly lithography layout shapes as well as a shorter bit line for speed improvement. However, as feature sizes continue to shrink in future technologies, there is concern about the metal conductors with respect to RC delay and noise coupling.